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ultralow quiescent current, 150 ma, cmos linear regulators data sheet adp160 / adp161 / adp162 / adp163 rev. g document feedback information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 ?2010C2012 analog devices, inc. all rights reserved. technical support www.analog.com features ultralow quiescent current i q = 560 na with 0 a load i q = 860 na with 1 a load stable with 1 f ceramic input and output capacitors maximum output current: 150 ma input voltage range: 2.2 v to 5.5 v low shutdown current: <50 na typical low dropout voltage: 195 mv @ 150 ma load initial accuracy: 1% accuracy over line, load, and temperature: 3.5% 15 fixed output voltage options: 1.2 v to 4.2 v adjustable output available psrr performance of 72 db @ 100 hz current limit and thermal overload protection logic-control enable integrated output discharge resistor 5-lead tsot package 4-ball, 0.5 mm pitch wlcsp applications mobile phones digital cameras and audio devices portable and battery-powered equipment post dc-to-dc regulation portable medical devices typical application circuits nc = no connect a dp160/adp162 1 2 3 5 4 1f 1f v out = 1.8v v in = 2.3v vout nc vin gnd en off on 08628-001 figure 1. 5-lead tsot adp160/adp162 with fixed output voltage, 1.8 v 1 2 3 5 4 1f 1f v out = 3.2v v in = 4.2v vout adj vin gnd en off on a dp161/adp163 r1 r2 0 8628-002 figure 2. 5-lead tsot adp161/adp163 with adjustable output voltage, 3.2 v vin vout 12 en gnd 1f 1f v out = 2.8v v in = 3.3v top view (not to scale) a dp160/adp162 a b off on 08628-003 figure 3. 4-ball wlcsp adp160/adp162 with fixed output voltage, 2.8 v general description the adp160 / adp161 / adp162 / adp163 are ultralow quiescent current, low dropout, linear regulators that operate from 2.2 v to 5.5 v and provide up to 150 ma of output current. the low 195 mv dropout voltage at 150 ma load improves efficiency and allows operation over a wide input voltage range. the adp16x are specifically designed for stable operation with a tiny 1 f 30% ceramic input and output capacitors to meet the requirements of high performance, space-constrained applications. the adp160 is available in 15 fixed output voltage options, ranging from 1.2 v to 4.2 v. the adp160 / adp161 also include a switched resistor to discharge the output automatically when the ldo is disabled. the adp162 is identical to the adp160 but does not include the output discharge function. the adp161 and adp163 are available as adjustable output voltage regulators. they are only available in a 5-lead tsot package. the adp163 is identical to the adp161 but does not include the output discharge function. short-circuit and thermal overload protection circuits prevent damage in adverse conditions. the adp160 and adp162 are available in a tiny 5-lead ts ot and a 4-ball, 0.5 mm pitch wlcsp package for the smallest footprint solution to meet a variety of portable power applications.
adp160/adp161/adp 162/adp163 data sheet rev. g | page 2 of 24 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 typical application circuits ............................................................ 1 general description ......................................................................... 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 input and output capacitor, recommended specifications .. 4 absolute maximum ratings ............................................................ 5 thermal data ................................................................................ 5 thermal resistance ...................................................................... 5 esd caution .................................................................................. 5 pin configurations and function descriptions ........................... 6 typical performance characteristics ..............................................8 theory of operation ...................................................................... 12 applications information .............................................................. 14 capacitor selection .................................................................... 14 enable fea ture ............................................................................ 15 current limit and thermal overload protection ................. 15 thermal considerations ............................................................ 16 pcb layout considerations ...................................................... 18 light sensitivity of wlcsps ..................................................... 18 outline dimensions ....................................................................... 20 ordering guide .......................................................................... 21 revision history 12/12 rev. f to rev. g changes to table 3 ............................................................................ 5 changes to pin 4 description ......................................................... 6 changes to figure 22 ...................................................................... 10 changes to figure 32 and figure 33 caption s ............................ 12 add ed light sensitivity of wlcsps section ............................... 18 9/12 rev. e to rev. f changes to ordering guide ........................................................... 21 4/12 rev. d to rev. e updated outline dimensions ........................................................ 20 changes to ordering guide ........................................................... 21 1/1 2 rev. c to rev. d changes to ordering guide .......................................................... 21 1/11 rev. b to rev. c changes t o figure 15 and figure 16 ............................................... 9 11/10 rev. a to rev. b changes to theory of operation .................................................. 13 changes to ordering guide .......................................................... 20 8/10 rev. 0 to rev. a added adp162/adp163 .............................................. throughout changes to figure 17 and figure 18 ............................................... 9 changes to figure 19, figure 20, and figure 23 ......................... 10 ad ded figure 21 and figure 22 (renumbered sequentially) ... 10 added figure 32 and figure 33 ..................................................... 12 changes to ordering guide .......................................................... 20 6 / 10 revision 0: initial version
data sheet adp160/adp161/adp162/adp163 rev. g | page 3 of 24 specifications v in = (v out + 0. 5 v) or 2. 2 v , whichever is greater ; en = v in , i out = 1 0 m a , c in = c out = 1 f , t a = 25c , unless otherwise noted. table 1 . parameter symbol conditions min typ max unit input voltage range v in t j = ?40c to +125c 2.2 5.5 v operating supply current i gnd i out = 0 a 5 6 0 1250 n a i out = 0 a, t j = ?40c to +125c 2 . 3 a i out = 1 a 86 0 1800 n a i out = 1 a, t j = ?40c to +125c 2.8 a i out = 100 a 2.6 4.5 a i out = 100 a, t j = ?40c to +125c 5.8 a i out = 10 ma 1 1 a i out = 10 ma, t j = ?40c to +125c 1 9 a i out = 150 ma 4 2 a i out = 150 ma , t j = ?40c to +125c 65 a shutdown current i gnd - sd en = gnd 50 n a en = gnd, t j = ?40c to +125c 1 a output voltage accuracy v out i out = 10 ma ?1 +1 % 0 a < i out < 150 ma , v in = ( v out + 0.5 v ) to 5.5 v ? 2 + 2 % 0 a < i out < 150 ma , v in = ( v out + 0.5 v ) to 5.5 v, t j = ?40c to +125c ? 3 .5 + 3 .5 % adjustable - output voltage accuracy (adp161 /adp163 ) 1 v adj i out = 1 0 ma 0. 99 1.0 1.01 v 0 a < i out < 150 ma , v in = (v out + 0.5 v) to 5.5 v 0. 98 1. 02 v 0 a < i out < 150 ma , v in = (v out + 0.5 v ) to 5.5 v, t j = ?40c to +125c 0.97 1.03 v regulation line regulation ?v out /?v in v in = ( v out + 0.5 v ) to 5.5 v, t j = ?40c to +125c ?0.1 +0.1 %/v load regulation 2 ?v out /?i out i out = 1 00 a to 1 50 ma 0.004 %/ma i out = 1 00 a to 150 ma , t j = ?40c to +125c 0.01 %/ma dropout voltage 3 v out = 3.3 v 4 - ball wlcsp v dropout i out = 10 ma 7 mv i out = 10 ma, t j = ?40c to +125c 1 3 mv i out = 150 ma 105 mv i out = 150 ma , t j = ?4 0c to +125c 1 95 mv 5 - lead tsot i out = 10 ma 8 mv i out = 10 ma, t j = ?40c to +125c 15 mv i out = 150 ma 1 20 mv i out = 150 ma , t j = ?40c to +125c 2 25 mv adj input bias current (adp161 /adp163 ) adj i - bias 2.2 v v in 5.5 v, adj conn ected to vout 10 na active pull - down resistance (adp160/adp161 ) t shutdown v out = 2.8 v, r load = 300 600 start - up time 4 t start - up v out = 3.3 v 1100 s current limit threshold 5 i limit 220 320 500 ma thermal shutdown thermal shutdown thre shold ts sd t j rising 150 c thermal shutdown hysteresis ts sd - hys 15 c en input en input logic high v ih 2.2 v v in 5.5 v 1.2 v en input logic low v il 2.2 v v in 5.5 v 0.4 v en input leakage current v i - leakage en = v in or gnd 0.1 a en = v in or gnd, t j = ?40c to +125c 1 a
adp160/adp161/adp 162/adp163 data sheet rev. g | page 4 of 24 parameter symbol conditions min typ max unit undervoltage lockout uvlo input voltage rising uvlo rise 2.19 v input voltage falling uvlo fal l 1.6 0 v hysteresis uvlo hys 100 mv output noise out noise 10 hz to 100 khz, v in = 5 v, v out = 3.3 v 105 v rms 10 hz to 100 khz, v in = 5 v, v out = 2.5 v 100 v rms 10 hz to 100 khz, v in = 5 v, v out = 1.2 v 8 0 v rms power supply rejection ratio psrr 10 0 hz, v in = 5 v, v out = 3.3 v 6 0 db 100 hz, v in = 5 v, v out = 2.5 v 6 5 db 100 hz, v in = 5 v, v out = 1.2 v 72 db 1 khz, v in = 5 v, v out = 3.3 v 5 0 db 1 khz, v in = 5 v, v out = 2.5 v 50 db 1 khz, v in = 5 v, v out = 1.2 v 62 db 1 accuracy when vout is connected directly to adj. when the vout voltage is set by external feedback resistors, the absolute accuracy in adjust mode depends on the tolerances of resistors used. 2 based on an end - point calculation using 0 a and 150 ma loads. 3 dropout voltage is defined as the input - to - output voltage differential when the input voltage is set to the nominal output voltage. this applies only for output voltages above 2.2 v. 4 star t - up time is defined as the time between the rising edge of en to v out being at 90% of its nominal value. 5 current limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. fo r example, the current limit for a 3.0 v output voltage is defined as the current that causes the output voltage to drop to 90% of 3.0 v or 2.7 v. input and output cap acitor, recommended specifications table 2 . parameter symbol conditions min typ max unit minimum input and output capacitance 1 c min t a = ?40c to +125c 0. 7 f capacitor esr r esr t a = ?40c to +125c 0 .001 0.2 1 the minimum input and output capacitance should be greater than 0.7 f over the full range of operating conditions. the full range of operating conditions in the application must be considered during device selection to ensure that the minimum capacitance specification is met. x7r and x 5r type capacitors are recommended ; ho wever, y5v and z5u capacitors are not recommended for use with any ldo.
data sheet adp160/adp161/adp162/adp163 rev. g | page 5 of 24 absolute maximum rat ings table 3 . parameter ratin g v in to gnd ? 0. 3 v to + 6 .5 v v out to gnd ? 0. 3 v to v in en to gnd ? 0. 3 v to vin adj to gnd ?0.3 v to vin nc to gnd ?0.3 v to vin storage temperature range ? 65c to +150c operating junction temperature range ? 40c to +125c operating ambient temper ature range ?40c to +125c soldering conditions jedec j - std -020 stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other c onditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. thermal data absolute maximum ratings only apply individuall y ; they do not apply in combi nation. the adp16x can be damaged when the junction temperature limits are exceeded. monitoring ambient temperature does not guarantee that t j is within the specified temperature limits. in applications with high power dissipat ion and poor thermal resistance, the maximum ambient temperature may have to be derated. in applications with moderate power dissipation and low pcb thermal resistance, the maximum ambient temperature can exceed the maximum limit as long as the junction t emperature is within specification limits. the junction temperature (t j ) of the device is dependent on the ambient temperature (t a ), the power dissipation of the device (p d ), a nd the junction - to - ambient thermal resistance of the package ( ja ). maximum junction temperature (t j ) is calculated from the ambient temperature (t a ) and power dissipation (p d ) using the formula t j = t a + ( p d ja ) junction - to - ambient thermal resistance ( ja ) of the package is based on modeling and calculation using a 4 - layer board. the junction - to - ambient thermal resistance is highly dependent on the application and board layout. in applications where high maximum power dissipation exists, close attention to thermal board desig n is required. the value of ja may vary, depending on pcb material, layout, and environmental conditions. the specified values of ja are based on a 4 - layer, 4 in ches 3 in ches , circuit board. refer to jesd 51 - 7 and jesd 51 - 9 for detailed information on the b oard construction. for additional information, see the an - 617 application note , microcsp ? wafer level chip scale package . jb is the junction to board thermal characterization parameter with units of c/w. jb of the package is based on modeling and calculation using a 4 - layer board. the jesd51 - 12, guidelines for reporting and using electronic package thermal information , states that thermal characterization parameters are not the same as thermal resistances. jb measures the component power flowing through multiple thermal paths rather than a single path as in thermal resistance, jb . therefore, jb thermal paths include convection from the top of the package as well as radiation from the package, factors that mak e jb more useful in real - world applications. maximum junction temperature (t j ) is calculated from the board temperature (t b ) and power dissipation (p d ) using the formula t j = t b + ( p d jb ) refer to jesd51 - 8 and jesd51 - 12 for more detailed information a bout jb . thermal resistance ja and jb are specified for the worst - case conditions, that is, a device soldered in a circuit board for surface - mount packages. table 4 . thermal resistance package type ja jb unit 5 - lead tsot 170 4 3 c/w 4 - ball , 0. 4 mm pitch wlcsp 260 58 c/w esd caution
adp160/adp161/adp162/adp163 data sheet rev. g | page 6 of 24 pin configurations and function descriptions nc = no connect adp160/ adp162 top view (not to scale) 1 2 3 5 4 vout nc vin gnd en 08628-004 figure 4. 5-lead tsot, fixed output pin configuration, adp160/adp162 table 5. 5-lead tsot pin functi on descriptions, adp160/adp162 pin no. mnemonic description 1 vin regulator input supply. bypass vin to gnd with a 1 f or greater capacitor. 2 gnd ground. 3 en enable input. drive en high to turn on the regulator; dr ive en low to turn off the regulator. for automatic startup, connect en to vin. 4 nc no connect. this pin is not connected internally. connect this pin to gnd or leave open. 5 vout regulated output voltage. bypass vout to gnd with a 1 f or greater capacitor. adp161/ adp163 top view (not to scale) 1 2 3 5 4 vout adj vin gnd en 08628-005 figure 5. 5-lead tsot, adjustable output pin configuration, adp161/adp163 table 6. 5-lead tsot pin functi on descriptions, adp161/adp163 pin no. mnemonic description 1 vin regulator input supply. bypass vin to gnd with a 1 f or greater capacitor. 2 gnd ground. 3 en enable input. drive en high to turn on the regulator; dr ive en low to turn off the regulator. for automatic startup, connect en to vin. 4 adj output voltage adjust pin. connect the midpoint of the vo ltage divider between vout and gnd to this pin to set the output voltage. 5 vout regulated output voltage. bypass vout to gnd with a 1 f or greater capacitor.
data sheet adp160/adp161/adp162/adp163 rev. g | page 7 of 24 12 a b top view (not to scale) adp160/ adp162 vin vout en gnd 0 8628-006 figure 6. 4-ball wlcsp pin configuration, adp160/adp162 table 7. 4-ball wlcsp pin function descriptions, adp160/adp162 pin no. mnemonic description a1 vin regulator input supply. bypass vin to gnd with a 1 f or greater capacitor. b1 en enable input. drive en high to turn on the regulator; drive en low to turn off the regulator. for automatic startup, connect en to vin. a2 vout regulated output voltage. bypass vout to gnd with a 1 f or greater capacitor. b2 gnd ground.
adp160/adp161/adp 162/adp163 data sheet rev. g | page 8 of 24 typical performance characteristics v in = 3. 8 v, v out = 3.3 v , i out = 1 ma , c in = c out = 1 f , t a = 25c, unless otherwise noted . 3.35 3.25 3.26 3.27 3.28 3.29 3.30 3.31 3.32 3.33 3.34 ?40 ?5 25 85 125 v out (v) junction temperature (c) load = 1a load = 100a load = 1ma load = 10ma load = 100ma load = 150ma 08628-007 figure 7 . output voltage (v out ) vs. junction temperature 3.35 3.25 3.27 3.29 3.31 3.33 3.26 3.28 3.30 3.32 3.34 0.001 0.01 1000 100 10 1 0.1 v out (v) i load (ma) 08628-008 figure 8 . output voltage (v out ) vs. load current (i load ) 3.35 3.25 3.27 3.29 3.31 3.33 3.26 3.28 3.30 3.32 3.34 3.7 5.5 5.3 5.1 4.9 4.7 4.5 4.3 4.1 3.9 v out (v) v in (v) load = 1a load = 100a load = 1ma load = 10ma load = 100ma load = 150ma 08628-009 figure 9 . output voltage (v out ) vs. input voltage (v in ) 100 0.1 1 10 ?40 ?5 25 85 125 ground current (a) junction temperature (c) load = 1a load = 100a load = 1ma load = 10ma load = 100ma load = 150ma no load 08628-010 figure 10 . ground current vs. junction temperature 100 0.1 1 10 0.001 0.01 1000 100 10 1 0.1 ground current (a) i load (ma) 08628-011 figure 11 . ground current vs. load current (i load ) 100 0.1 1 10 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5 ground current (a) v in (v) 08628-012 load = 1a load = 100a load = 1ma load = 10ma load = 100ma load = 150ma no load figure 12 . ground current vs. input voltage (v in )
data sheet adp160/adp161/adp162/adp163 rev. g | page 9 of 24 0.18 0 0.02 0.04 0.06 0.08 0.10 0.12 0.14 0.16 ?40 ?5 25 85 125 shutdown current (a) temperature (c) v in = 2.9v v in = 3.2v v in = 3.8v v in = 4.1v v in = 4.7v v in = 5.5v 08628-013 figure 13 . shutdown current vs. temperature at various input voltages 250 200 150 100 50 0 1 10 100 1000 dropout voltage (mv) i load (ma) 08628-014 v out = 2v v out = 3.3v figure 14 . dropout voltage vs. load current (i load ) 3.35 3.30 3.25 3.20 3.15 3.10 3.05 3.00 3.1 3.2 3.3 3.4 3.5 3.6 v out (v) v in (v) load = 1ma load = 5ma load = 10ma load = 50ma load = 100ma load = 250ma 08628-015 figure 15 . output voltage (v out ) vs. input voltage ( v in ) in dropout 140 120 100 80 60 40 20 0 3.1 3.2 3.3 3.4 3.5 3.6 ground current (a) v in (v) load = 1ma load = 5ma load = 10ma load = 50ma load = 100ma load = 150ma 08628-016 figure 16 . ground current vs. input voltage (v in ) i n dropout 0 ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 10 100 10m 1m 100k 10k 1k psrr (db) frequency (hz) load = 150ma load = 100ma load = 10ma load = 1ma load = 100a 08628-017 figure 17 . power supply rejection ratio vs. frequency, v out = 1.2 v , v in = 2.2 v 0 ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 10 100 10m 1m 100k 10k 1k psrr (db) frequency (hz) load = 150ma load = 100ma load = 10ma load = 1ma load = 100a 08628-018 figure 18 . power supply rejection ratio vs. frequency, v out = 2.5 v , v in = 3.5 v
adp160/adp161/adp162/adp163 data sheet rev. g | page 10 of 24 0 ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 10 100 10m 1m 100k 10k 1k psrr (db) frequency (hz) load = 150ma load = 100ma load = 10ma load = 1ma load = 100a 08628-019 figure 19 . power supply rejection ratio vs. frequency , v out = 3.3 v, v in = 4.3 v 0 ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 10 100 10m 1m 100k 10k 1k psrr (db) frequency (hz) load = 3.3v/150ma load = 2.5v/150ma load = 1.2v/150ma load = 3.3v/1ma load = 2.5v/1ma load = 1.2v/1ma 08628-020 figure 20 . power supply rejection ratio vs. frequency various output voltages and load currents, v in ? v out = 1 v 0 ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 10 100 10m 1m 100k 10k 1k psrr (db) frequency (hz) load = 150ma load = 100ma load = 10ma load = 1ma load = 100a 08628-051 figure 21 . power supply rejection ratio vs. frequency various output voltages and load currents, v out = 2.5 v, v in = 3.0 v 0 ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 10 100 10m 1m 100k 10k 1k psrr (db) frequency (hz) load = 150ma load = 100ma load = 10ma load = 1ma load = 100a 08628-052 figure 22 . power supply rejection ratio vs. frequency various output voltages and load currents, v out = 3.3 v, v in = 3.8 v 0 ?100 ?90 ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 10 100 10m 1m 100k 10k 1k psrr (db) frequency (hz) load = 150ma load = 100ma load = 10ma load = 1ma load = 100a 08628-021 figure 23 . adjustable adp161 power supply rejection ratio vs. frequency, v out = 3.3 v, v in = 4.3 v 1k 1 10 100 0.001 0.01 1000 100 10 1 0.1 noise (v rms) load current (ma) v out = 3.3v v out = 2.5v v out = 1.2v adj 3.3v 08628-022 figure 24 . output noise vs. load curr ent and output voltage, v in = 5 v, c out = 1 f
data sheet adp160/adp161/adp162/adp163 rev. g | page 11 of 24 10 0.1 1 10 100k 10k 1k 100 noise (v/ hz) frequency (hz) v out = 1.2v v out = 3.3v v out = 2.5v 08628-023 figure 25 . output noise spectral density, v in = 5 v, i load = 10 ma, c out = 1 f ch1 100ma ? ch2 200mv m200s a ch1 62ma t 10.40% 1 2 t load current v out 08628-024 figure 26 . load transient response, c in , c out = 1 f, i load = 1 ma to 150 ma, 200 ns rise time, ch1 = load current, ch2 = v out ch1 20ma ? ch2 5mv m200s a ch1 24ma t 10.40% 1 2 t load current v out 08628-025 figure 27 . load transient response, c in , c out = 1 f, i load = 1 ma to 50 ma, 200 ns rise time, ch1 = load current, ch2 = v out ch1 1v ? ch2 20mv m200s a ch1 4.34v t 10.20% 1 2 t v in v out 08628-026 figure 28 . line transient response, v in = 4 v to 5 v, c in = c out = 1 f, i load = 150 ma, ch1 = v in , ch2 = v out ch1 1v ? ch2 20mv m200s a ch1 4.56v t 10.20% 1 2 t v in v out 08628-027 figure 29 . line transient response, v in = 4 v to 5 v, c in , = 1 f, c out = 10 f, i load = 150 ma, ch1 = v in , ch2 = v out
adp160/adp161/adp162/adp163 data sheet rev. g | page 12 of 24 theory of operation the adp16x are ultra low quiescent current, low dropout linear regulator s that operate from 2. 2 v to 5.5 v and can provide up to 150 ma of output current. drawing only 56 0 na (typical) at no load and a low 4 2 a of quiescent current (typical) at full load makes the adp16 x ideal for battery - operated portable equip - ment. shutdown current consumption is typically 5 0 na. using new innovative design techniques, the adp16 x provide ultralow quiescent current and superior transient performance for digi tal and rf applications . the adp16x are also o ptimized for use with small 1 f ceramic capacitors . reference short circuit, uvlo, and thermal protect shutdown r1 r2 vout vin gnd en r3 08628-028 adp160 figure 30 . internal block diagram , fixed output with output d ischarge function reference short circuit, uvlo, and thermal protect shutdown vout adj vin gnd en r1 08628-030 adp161 figure 31 . internal bloc k diagram, adjustable output with output d ischarge function 08628-053 reference short circuit, uvlo, and thermal protect shutdown vout vin gnd en r1 r2 adp162 figure 32 . internal block diagram, fixed output with out output discharge function 08628-054 reference short circuit, uvlo, and thermal protect shutdown vout adj vin gnd en adp163 figure 33 . internal block diagram, adjustable output with out output discharge function internally, the adp16x consist s of a reference, an error amplifier, a feedback voltage divider , and a pmos pass transistor. output current is delivered via the pmos pass device , which is controlled by the error amplifier. the err or amplifier compares the reference voltage with the feedback vol tage from the output and amplifies the difference. if the feedback voltage is lower than the reference voltage, the gate of the pmos devic e is pulled lower, allowing more current to pass an d incre asing the output voltage. if the feedback voltage is higher than the reference voltage, the gate of the pmos device is pulled higher, allowing le ss current to pass and decreasing the output voltage. the adjustable adp161 /adp163 ha ve an output voltage range of 1. 0 v to 4.2 v. the output voltage is set by the ratio of two external resistors, as shown in figure 2 . the device servos the output to maintain the voltage at the adj pin at 1. 0 v refe - renced to ground. the current in r1 is then equal to 1.0 v/r2 , and the current in r1 is the current in r2 plus the adj pin bias curre nt. the adj pin bias current, 10 na at 25c, flows through r1 into the adj pin. the output voltage can be calculated using the equation: v out = 1.0 v(1 + r 1 / r2 ) + ( adj i - bias )(r1 ) the value of r1 should be less than 200 k to minimize errors in the output voltage caused by the adj pin bias current. for example, when r1 and r2 each equal 200 k, the output voltage is 2 .0 v. the output voltage error introduced by the adj pin bias curr ent is 2 mv or 0.05% , assuming a typical adj pin bias current of 10 na at 25c.
data sheet adp160/adp161/adp162/adp163 rev. g | page 13 of 24 to minimize quiescent current in the adp161 and adp163 analog devices, inc., recommends using high values of resistance for r1 and r2. using a value of 1 m for r2 keeps the total, no load quiescent current below 2 a. note however, that high value of resistance introduces a small output voltage error. for example, assuming r1 and r2 are 1 m , the output voltage is 2 v. taking into account the nominal adj pin bias current of 10 na, the output voltage error is 0.25% . note that in shutdown, the output is turned off and the divider current is zero. the adp160 /adp161 also in c lude an output discharge resistor to force the output voltage to zero when the ldo is disabled. this ensure s that the output of the ldo is always in a well - defined state , whether it is enabled or not. the adp162 /adp163 do not include the output discharge function. the adp160 /adp162 are available in 1 5 output voltage options , ranging from 1.2 v to 4.2 v . the adp 16 x use the en pin to enab le and disable the v out pin under normal operating conditions. when en is high, v out turns on, and when en is low, v out turns off. for automatic startup, en can be tied to v in.
adp160/adp161/adp162/adp163 data sheet rev. g | page 14 of 24 application s information capacitor selection outpu t capacitor the adp16x are designed for operation with small, space - saving ceramic capacitors, but function with most commonly used capacitors as long as care is taken with regard to the effective series resistance ( esr ) value. the esr of the output capaci tor affects stabi lity of the ldo control loop . a minimum of 1 f capacitance with an esr of 1 ? or less is recommended to ensure stability of the adp16 x . t ransient response to changes in load current is also a ffected by output capacitance . using a larger v alue of output capacitance improve s the transient response of the adp16x to large changes in load current. figure 34 and figure 35 show the transient responses for o utput capacitance values of 1 f and 10 f , respectively . ch1 100ma ? ch2 200mv m200s a ch1 62ma t 10.40% 1 2 t load current v out 08628-032 figure 34 . output transient response, c out = 1 f , ch1 = load current, c h 2 = v out ch1 100ma ? ch2 200mv m200s a ch1 74ma t 10.00% 1 2 t load current v out 08628-033 figure 35 . output transient response, c out = 10 f , ch1 = load current, c h 2 = v out input bypass ca pacitor connecting a 1 f capacitor from v in to gnd reduces the circuit sensitivity to the printed circuit board (pcb) layout, especially when long input traces or high source impedance are encountered. if greater than 1 f of output capacitance is require d, the input capacitor should be increased to match it . input and output capacitor properties any good quality ceramic capacitors can be used with the adp16x , as long as they meet the minimum capacitance and maximum esr requirements. ceramic capacitors are manufactured with a variety of dielectrics, each with different behavior over temperature and applied voltage. c apacitors must have a dielectric adequate to ensure the minimum capacitance over the necessary temperature range and dc bias conditions . x5r or x7r dielectrics with a voltage rating of 6.3 v or 10 v are recommended . y5v and z5u dielectrics are not recommended due to their poor temperature and dc bias characteristics. figure 36 depicts the capacitance vs . voltage bias c haracteristic of a 0402, 1 f, 10 v, x5r capacitor. the voltage stability of a capacitor is strongly influenced by the capacitor size and voltage rating. in general, a capacitor in a larger package or higher voltage rating exhibit s better stability. the te mperature variation of the x5r dielectric is about 15% over the ? 40c to + 85 c temperature range and is not a function of package or voltage rating. 1.2 1.0 0.8 0.6 0.4 0.2 0 0 2 4 6 8 10 capacitance (f) voltage 08628-034 figure 36 . capacitance vs . voltage characteristic use equation 1 to determine the worst - case capacitance accounting for capacitor variation over temperature, component tolerance, and voltage. c eff = c bias (1 ? tempco ) (1 ? tol ) (1) where: c bias is the effective capacitance at the operating voltage. tempco is the worst - case capacitor temperature coefficient. tol is the worst - case component tole rance. in this example, the worst - case temperature coefficient (tempco) over ?40c to +85c is assumed to be 15% for an x5r dielectric. the tolerance of the capacitor (tol) is assumed to be 10%, and c bias is 0.94 f at 1.8 v , as shown in figure 36. substituting these values in equation 1 yields c eff = 0.94 f (1 ? 0.15) (1 ? 0.1) = 0.719 f therefore, the capacitor chosen in this example meets the minimum capacitance requirement of the ldo over temperature and tolerance at th e chosen output voltage.
data sheet adp160/adp161/adp162/adp163 rev. g | page 15 of 24 to guarantee the performance of the adp16x , it is imperative that the effects of dc bias, temperature, and tolerances on the behavior of the capacitors are evaluated for each . enable feature the adp16x use the en pin to enable and disable the v out pin under normal operating conditions. as shown in figure 37 , when a rising voltage on en crosses the active threshold, v out turns on. when a falling voltage on en crosses the inactive threshold, v out turns off. 4.5 3.5 2.5 4.0 3.0 2.0 1.5 0.5 1.0 0 0.5 0.7 0.9 1.1 1.3 1.5 v out (v) en voltage (v) 08628-035 fi gure 37 . typical en pin operation as shown in figure 37 , the en pin has hysteresis built in. this prevents on/off oscillations that can occur due to noise on the en pin as it passes through the threshold points. the en pin active/inactive thresholds are derived from the v in voltage. therefore, these thresholds vary with changing input voltage. figure 38 shows typical en active/inactive thresholds when the input voltage varies f rom 2. 2 v to 5.5 v. 1.1 1.0 0.9 0.8 0.7 0.6 0.5 2.0 2.5 3.0 3.5 en rise en fall 4.0 4.5 5.0 en voltage (v) input voltage (v) 08628-036 figure 38 . typical en pin thresholds vs. input voltage the start - up behavior of the adp16x is shown in figure 39. the shutdown behavior of the adp160/adp161 is shown in figure 40. 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 0 4500 4000 3500 3000 2500 2000 1500 1000 500 1.2v 2.5v 3.3v en voltage/v out (v) time (s) en 08628-037 figure 39 . typical start - up behavior (adp16x) 4.5 3.5 4.0 3.0 2.5 2.0 1.5 1.0 0.5 0 0 1000 800 600 400 200 1.2v 4.2v en voltage/v out (v) time (s) en 08628-038 c out = 1f figure 40 . typical shutdown behavior , no load (adp160/adp161) c urrent l imit and t hermal overload protection the adp16x are protected aga inst damage due to excessive power dissipation by current and thermal overload protection circuits . the adp16x are designed to current limit when the output load reaches 3 2 0 ma (typical). when the output load exceeds 3 2 0 ma, the output voltage is reduced t o maintain a constant current limit. thermal overload protection is included , which limit s the junction temperature to a maximum of 150c (typical) . under extreme conditions (that is, high ambient temperature and power dissipation) , when the junction tempe rature starts to rise above 150c, the output is turned off , reduc ing the output current to zero . when th e junction temperature drops below 135c, t he output is turned on again and the output current is restored to its nominal value .
adp160/adp161/adp162/adp163 data sheet rev. g | page 16 of 24 consider the case whe re a hard short from out to ground occurs. at first , the adp16x current limit so that only 320 ma is conducted into the short. if sel f - heating of the junction is great enough to cause its temperature to rise above 150c , thermal shutdown activ ate s , turning off the output and reducing the output current to zero. as the junction tempera - ture cools and drops below 135c, the output turn s on and conduct s 320 ma into the short, again caus ing the junction temperature to rise above 150c . this thermal oscillation between 135c and 150c cause s a current oscillation between 320 ma and 0 ma that continue s as long as the short remains at the output. current and thermal limit protections are intended to protect the device against accidenta l overload conditions. for re liable operation, device power dissipation must be externally limited so junction temperatures do not exceed 125c. thermal consideratio ns in most applications, the adp16x do not dissip ate much heat due to their high efficiency. however, in applications wi th high ambient temperature and high supply voltage to output voltage differential, the heat dissipated in the packag e is large enough that it can cause the junction temperature of the die to exceed the maximum junction temperature of 125c. when the junc tion temperature exceeds 150c, the converter enters thermal shutdown. it recovers only after the junction temperature has decreased below 135c to prevent any permanent damage. therefore, thermal analysis for the chosen application is very important to gu arantee reliable performance over all conditions. the junction temperature of the die is the sum of the ambient temperature of the environment and the temperature rise of the package due to the power dissipation, as shown in equation 2. to guarantee reliab le operation, the junction temperature of the adp16x must not exceed 125c. to ensure the junction temperature stays below this maximum value, the user needs to be aware of the parameters that contribute to junction temperature changes. these parameters include ambient temperature , power dissipation in the power device, and thermal resistances between the junction and ambient air ( ja ). the ja number is dependent on the package assembly compounds that are used and the amount of copper used to solder the package gnd pins to the pcb. table 8 shows the typical ja values of the 5 - lead tsot and the 4 - ball wlcsp for various pcb copper sizes. table 9 shows the typical jb value of the 5 - lead tsot and 4 - ball wlcsp. table 8 . typical ja values ja (c/w) copper size (mm 2 ) tsot wlcs p 0 1 170 260 50 152 159 100 146 157 300 134 153 500 131 151 1 device soldered to minimum size pin traces. table 9 . typical jb values jb (c/w) tsot wlcsp 42.8 58.4 the junction temperature of the adp16x can be calculated from the following equation: t j = t a + ( p d ja ) (2) where: t a is the ambient temperature. p d is the power dissipation in the die, given by p d = [( v in ? v out ) i load ] + ( v in i gnd ) (3) where: i load is the load current. i gnd is the ground current. v in an d v out are input and output voltages, respectively. power dissipation due to ground current is quite small and can be ignored. therefore, the junction temperature equation simplifies to the following: t j = t a + {[( v in ? v out ) i load ] ja } (4) as shown i n equation 4, for a given ambient temperature , input - to - output voltage differential, and continuous load current , there exists a minimum copper size requirement for the pcb to ensure the junction temperature does not rise above 125c. figure 41 to figure 48 show the junction temperature calculations for the different ambient temperatures, load currents, v in - to - v out differentials, and areas of pcb copper. in the case where the board temperature is known, use the thermal characterization parameter, jb , to estimate the junction temperature rise (see figure 49 and figure 50 ). maximum junction temperature (t j ) is calculated from the board temperature (t b ) and power dissipation (p d ) using the following formula: t j = t b + ( p d jb ) (5) the typical value of jb is 58c/w for the 4 - ball wlcsp package and 43c/w for the 5 - lead tsot package. 140 120 100 80 60 40 20 0 0.3 4.8 4.3 3.8 3.3 2.8 2.3 1.8 1.3 0.8 v in ? v out (v) junction temperature, t j (c) maximum junction temperature i load = 1ma i load = 10ma i load = 50ma i load = 100ma i load = 150ma i load = 200ma 08628-039 figure 41 . 500 mm 2 of pcb copper, wlcsp , t a = 25 c
data sheet adp160/adp161/adp162/adp163 rev. g | page 17 of 24 140 120 100 80 60 40 20 0 0.3 4.8 4.3 3.8 3.3 2.8 2.3 1.8 1.3 0.8 v in ? v out (v) junction temperature, t j (c) maximum junction temperature i load = 1ma i load = 10ma i load = 50ma i load = 100ma i load = 150ma i load = 200ma 08628-040 figure 42 . 100 mm 2 of pcb copper, wlcsp , t a = 50 c 140 120 100 80 60 40 20 0 0.3 4.8 4.3 3.8 3.3 2.8 2.3 1.8 1.3 0.8 v in ? v out (v) junction temperature, t j (c) i load = 1ma i load = 10ma i load = 50ma i load = 100ma i load = 150ma i load = 200ma maximum junction temperature 08628-041 figure 43 . 50 0 mm 2 of pcb copper, wlcsp , t a = 8 5c 140 120 100 80 60 40 20 0 0.3 4.8 4.3 3.8 3.3 2.8 2.3 1.8 1.3 0.8 v in ? v out (v) junction temperature, t j (c) i load = 1ma i load = 10ma i load = 50ma i load = 100ma i load = 150ma i load = 200ma maximum junction temperature 08628-042 figure 44 . 1 00 mm 2 of pcb copper, wlcsp , t a = 5 0c 140 120 100 80 60 40 20 0 0.3 4.8 4.3 3.8 3.3 2.8 2.3 1.8 1.3 0.8 v in ? v out (v) junction temperature, t j (c) i load = 1ma i load = 10ma i load = 50ma i load = 100ma i load = 150ma i load = 200ma maximum junction temperature 08628-043 figure 45 . 5 00 mm 2 of pcb copper, tsot , t a = 2 5c 140 120 100 80 60 40 20 0 0.3 4.8 4.3 3.8 3.3 2.8 2.3 1.8 1.3 0.8 v in ? v out (v) junction temperature, t j (c) i load = 1ma i load = 10ma i load = 50ma i load = 100ma i load = 150ma i load = 200ma maximum junction temperature 08628-044 figure 46 . 10 0 mm 2 of pcb copper, tsot , t a = 2 5c 140 120 100 80 60 40 20 0 0.3 4.8 4.3 3.8 3.3 2.8 2.3 1.8 1.3 0.8 v in ? v out (v) junction temperature, t j (c) i load = 1ma i load = 10ma i load = 50ma i load = 100ma i load = 150ma i load = 200ma maximum junction temperature 08628-045 figure 47 . 500 mm 2 of pcb copper, tsot , t a = 5 0c
adp160/adp161/adp162/adp163 data sheet rev. g | page 18 of 24 140 120 100 80 60 40 20 0 0.3 4.8 4.3 3.8 3.3 2.8 2.3 1.8 1.3 0.8 v in ? v out (v) junction temperature, t j (c) i load = 1ma i load = 10ma i load = 50ma i load = 100ma i load = 150ma i load = 200ma maximum junction temperature 08628-046 figure 48 . 1 00 mm 2 of pcb copper, tsot , t a = 5 0c 140 120 100 80 60 40 20 0 0.3 4.8 4.3 3.8 3.3 2.8 2.3 1.8 1.3 0.8 v in ? v out (v) junction temperature, t j (c) i load = 1ma i load = 10ma i load = 50ma i load = 100ma i load = 150ma i load = 200ma maximum junction temperature 08628-047 figure 49 . wlcsp , t a = 85c 140 120 100 80 60 40 20 0 0.3 4.8 4.3 3.8 3.3 2.8 2.3 1.8 1.3 0.8 v in ? v out (v) junction temperature, t j (c) i load = 1ma i load = 10ma i load = 50ma i load = 100ma i load = 150ma i load = 200ma maximum junction temperature 08628-048 figure 50 . tsot , t a = 85c pcb layout consideration s heat dissipation from the package can be improved by increasing the amount of coppe r attached to the pins of the adp16x . however, as listed in table 8 , a point of diminishing returns is reached eventually , beyond which an increas e in the co pper size does not yield significant heat dissipation benefits . place t he input capacitor as close as possible to the v in and gnd pins. place t he output capacitor as close as possible to the v out and gnd pins . use of 0402 or 0603 size capacitors and resistors achieve s the smallest possible footprint solution on boards where a rea is limited . light s ensitivity of wlcsp s the wlcsp package option is essentially a silicon die with additional post fabrication dielectric and metal processing designed to contact solder bumps on the active side of the chip. with this package type, the die is exposed to ambient light and is subject to photoelectric effects. light sensitivity analysis of a wlcsp mounted on standard pcb material reveals that performance may be impacted when the package is illuminated directly by high intensity light. no d egradation in electrical performance is observed due to illumination by low intensity (0.1 mw/cm 2 ) ambient light. direct sunlight can have inten - sities of 50 mw/cm 2 , office ambient light can be as low as 0.1 mw/cm 2 . when the wlcsp is assembled on the board with the bump side of the die facing the pcb, reflected light from the pcb surface is incident on active silicon circuit areas and results in the increased leakage currents. no performance degrada - tion occurs due to illumination of the backside (substra te) of t h e w l c s p. all wlcsps are particularly sensitive to incident light with waveleng ths in the near infrared range (nir, 700 nm to 1000 nm ). photons in this waveband have a longer wavelength and lower energy than photon s in the visible (400 nm to 700 nm ) and near ultraviolet (nuv, 200 nm to 400 nm) bands; therefore, they can penetrate more deeply into the active silicon. incident light with wavelengths greater than 1100 nm has no photoelectric effect on silicon devices because silicon is transparent to wavelengths in this range. the spectral content of conventional light sources varies considerably. sunlight has a broad spectral range, with peak intensity in the visible band that falls off in the nuv and nir bands; fluorescent lamps have significant pea ks in the visible but not the nuv or nir bands. tungsten lighting has a broad peak in the longer visible wavelengths with a significant tail in the nir. efforts have been made at a product level to reduce the effect of ambient light; the under bump metal ( ubm) has been designed to shield the sensitive circuit areas on the active side (bump side) of the die. however, if an application encounters any light sensitivity with the wlcsp, shielding the bump side of the wlcsp package with opaque material should eli minate this effect. shielding can be accomplished using materials such as silica - filled liquid epoxies like those used in flip - chip underfill techniques.
data sheet adp160/adp161/adp162/adp163 rev. g | page 19 of 24 08628-049 figure 51 . example of 5- lead tsot pcb layout 08628-050 figure 52 . example of 4- ball wlcsp pcb layout
adp160/adp161/adp162/adp163 data sheet rev. g | page 20 of 24 outline dimensions 100708-a * compliant to jedec standards mo-193-ab with the exception of package height and thickness. 1.60 bsc 2.80 bsc 1.90 bsc 0.95 bsc 0.20 0.08 0.60 0.45 0.30 8 4 0 0.50 0.30 0.10 max * 1.00 max * 0.90 max 0.70 min 2.90 bsc 54 12 3 seating plane figure 53. 5-lead thin small outline transistor package [tsot] (uj-5) dimensions shown in millimeters 1.000 0.965 sq 0.925 bottom view (ball side up) top view (ball side down) a 12 b ball a1 identifier 0.50 ref 0.640 0.595 0.550 end view 0.340 0.320 0.300 0.370 0.355 0.340 seating plane 0.270 0.240 0.210 coplanarity 0.03 04-17-2012-a figure 54. 4-ball wafer level chip scale package [wlcsp] (cb-4-1) dimensions shown in millimeters
data sheet adp160/adp161/adp162/adp163 rev. g | page 21 of 2 4 ordering guide model 1 temperature range output voltage (v) package description package option branding adp160acbz - 1.2-r7 ?40c to +125c 1.2 4 - ball wlcsp cb -4 -1 5k adp160acbz - 1.5-r7 ?40c to +125c 1.5 4 - ball wlcsp cb -4 -1 5l adp160acbz - 1.8-r7 ?40c to +125c 1.8 4 - ball wlcsp cb -4 -1 5n adp160acbz - 2.1-r7 ?40c to +125c 2.1 4 - ball wlcsp cb -4 -1 5p adp160acbz - 2.3-r7 ?40c to +125c 2.3 4 - ball wlcsp cb -4 -1 ah adp160acbz - 2.5-r7 ?40c to +125 c 2.5 4 - ball wlcsp cb -4 -1 5q adp160acbz - 2.7-r7 ?40c to +125c 2.7 4 - ball wlcsp cb -4 -1 am adp160acbz - 2.75-r7 ?40c to +125c 2.75 4 - ball wlcsp cb -4 -1 5r adp160acbz - 2.8-r7 ?40c to +125c 2.8 4 - ball wlcsp cb -4 -1 5s adp160acbz - 2.85-r7 ?40c to +125c 2. 85 4 - ball wlcsp cb -4 -1 5t adp160acbz - 3.0-r7 ?40c to +125c 3.0 4 - ball wlcsp cb -4 -1 5u adp160acbz - 3.3-r7 ?40c to +125c 3.3 4 - ball wlcsp cb -4 -1 5v adp160acbz - 4.2 - r7 ?40c to +125c 4.2 4 - ball wlcsp cb - 4 - 1 6u adp160aujz - 1.2- r7 ?40c to +125c 1.2 5 - lea d tsot uj -5 ldq adp160aujz - 1.5- r7 ?40c to +125c 1.5 5 - lead tsot uj -5 ldr adp160aujz - 1.8- r7 ?40c to +125c 1.8 5 - lead tsot uj -5 le0 adp160aujz - 2.3- r7 ?40c to +125c 2.3 5 - lead tsot uj -5 llp adp160aujz - 2.5- r7 ?40c to +125c 2.5 5 - lead tsot uj -5 lfz adp160aujz - 2.7- r7 ?40c to +125c 2.7 5 - lead tsot uj -5 ljf adp160aujz - 2.8- r7 ?40c to +125c 2.8 5 - lead tsot uj -5 lg0 adp160aujz - 3.0- r7 ?40c to +125c 3.0 5 - lead tsot uj -5 y2u adp160aujz - 3.3- r7 ?40c to +125c 3.3 5 - lead tsot uj -5 lg1 adp160aujz - 4.2- r7 ?40c to +125c 4.2 5 - lead tsot uj -5 lgy adp161aujz -r7 ?40c to +125c adjustable 5 - lead tsot uj -5 lhw adp162acbz - 1.2-r7 ?40c to +125c 1.2 4 - ball wlcsp cb -4 -1 70 adp162acbz - 1.8-r7 ?40c to +125c 1.8 4 - ball wlcsp cb -4 -1 71 adp162acbz - 2.1-r7 ?40c to +125c 2.1 4 - ball wlcsp cb -4 -1 72 adp162acbz -2. 3 -r7 ?40c to +125c 2.3 4 - ball wlcsp cb -4 -1 bc adp162acbz - 2.8-r7 ?40c to +125c 2.8 4 - ball wlcsp cb -4 -1 73 adp162acbz - 3.0-r7 ?40c to +125c 3.0 4 - ball wlcsp cb -4 -1 74 adp162acbz - 4.2-r7 ?40c to +125 c 4.2 4 - ball wlcsp cb -4 -1 75 adp162aujz - 1.5- r7 ?40c to +125c 1.5 5 - lead tsot uj -5 lh9 adp162aujz - 1.8- r7 ?40c to +125c 1.8 5 - lead tsot uj -5 lln adp162aujz - 2.3- r7 ?40c to +125c 2.3 5 - lead tsot uj -5 llq adp162aujz - 2.5- r7 ?40c to +125c 2.5 5 - lead t sot uj -5 lhb adp162aujz - 2.7- r7 ?40c to +125c 2.7 5 - lead tsot uj -5 ljk adp162aujz - 2.8- r7 ?40c to +125c 2.8 5 - lead tsot uj -5 lhc adp162aujz - 3.0- r7 ?40c to +125c 3.0 5 - lead tsot uj -5 lhd adp162aujz - 3.3- r7 ?40c to +125c 3.3 5 - lead tsot uj -5 lhe ad p162aujz - 4.2- r7 ?40c to +125c 4.2 5 - lead tsot uj -5 lhf adp163aujz -r7 ?40c to +125c adjustable 5 - lead tsot uj -5 lhg adp160ujz - redykit evaluation board kit adp162ujz - redykit evaluation board kit adp161uj - evalz evaluation board adp163uj - evalz evaluation board 1 z = rohs compliant part.
adp160/adp161/adp162/adp163 data sheet rev. g | page 22 of 24 notes
data sheet adp160/adp161/adp162/adp163 rev. g | page 23 of 24 notes
adp160/adp161/adp162/adp163 data sheet rev. g | page 24 of 24 notes ? 2010 C 2012 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d08 628 - 0- 12/12(g)

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